symbol v dss i d i dm v gs v gsm p d t j ,t stg t l i ar e ar e as static electrical characteristics maximum ratings all ratings: t c = 25c unless otherwise speci ed. caution: these devices are sensitive to electrostatic discharge. proper handling procedures should be followed. 050-5896 rev e 2-2010 characteristic / test conditions / part number drain-source breakdown voltage (v gs = 0v, i d = 250 a) on state drain current 2 (v ds > i d (on) x r ds (on) max, v gs = 12v) drain-source on-state resistance 2 (v gs = 12v, 29a) zero gate voltage drain current (v ds = 500v, v gs = 0v) zero gate voltage drain current (v ds = 400v, v gs = 0v, t c = 125c) gate-source leakage current (v gs = 30v, v ds = 0v) gate threshold voltage (v ds = v gs , i d = 2.5ma) min typ max 500 58 0.09 25 250 100 2 4 unit volts amps ohms a na volts symbol bv dss i d (on) r ds (on) i dss i gss v gs (th) linear mosfet linear mosfets are optimized for applications operating in the linear region where concurrent high voltage and high current can occur at near dc conditions (>100 msec). ? higher fbsoa ? higher power dissipation ? popular t-max? or to-264 package parameter drain-source voltage continuous drain current @ t c = 25c pulsed drain current 1 gate-source voltage continuous gate-source voltage transient total power dissipation @ t c = 25c linear derating factor operating and storage junction temperature range lead temperature: 0.063" from case for 10 sec. avalanche current 1 (repetitive and non-repetitive) repetitive avalanche energy 1 single pulse avalanche energy 4 unit volts amps volts watts w/c c amps mj APL502B2_l (g) 500 58 232 30 40 730 5.84 -55 to 150 300 58 50 3000 t-max tm to-264 g d s microsemi website - http://www.microsemi.com APL502B2(g) apl502l(g) 500v, 58a, 0.090 *g denotes rohs compliant, pb free terminal finish.
dynamic characteristics APL502B2_l(g) 050-5896 rev e 2-2010 symbol c iss c oss c rss t d (on) t r t d (off) t f min typ max 7485 9000 1290 1810 617 930 13 26 27 54 56 84 16 20 unit pf ns test conditions v gs = 0v v ds = 25v f = 1 mhz v gs = 15v v dd = 250v i d = 29a @ 25c r g = 0.6 w characteristic input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time thermal characteristics 1 repetitive rating: pulse width limited by maximum junction 3 see mil-std-750 method 3471 temperature. 4 starting t j = +25c, l = 1.78mh, r g = 25 w , peak i l = 58a 2 pulse test: pulse width < 380 s, duty cycle < 2% microsemi reserves the right to change, without notice, the speci cations and information contained herein. 10 -5 10 -4 10 -3 10 -2 10 -1 1.0 rectangular pulse duration (seconds) figure 1, maximum effective transient thermal impedance, junction-to-case vs pulse duration 0.18 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 0.5 0.1 0.3 0.7 d = 0.9 0.05 z jc , thermal impedance (c/w) single pulse characteristic junction to case package weight symbol r q jc w t min typ max .17 0.22 5.9 unit c/w oz g
v ds > i d (on) x r ds (on)max. 250 sec. pulse test @ <0.5 % duty cycle t j = +125c t j = +25c t j = -55c v gs =10v v gs =20v normalized to v gs = 10v @ 29a 050-5896 rev e 2-2010 typical performance curves v gs , gate-to-source voltage (volts) i d , drain current (amperes) figure 4, transfer characteristics figure 5, r ds (on) vs drain current t c , case temperature (c) t j , junction temperature (c) figure 6, maximum drain current vs case temperature figure 7, breakdown voltage vs temperature 0 2 4 6 8 10 0 20 40 60 80 100 120 25 50 75 100 125 150 -50 0 50 100 150 1.30 1.20 1.10 1.00 0.90 0.80 0.70 1.15 1.10 1.05 1.00 0.95 0.90 80 60 40 20 0 60 50 40 30 20 10 0 APL502B2_l(g) 120 100 80 60 40 20 0 120 100 80 60 40 20 0 0 50 100 150 200 250 0 5 10 15 20 25 30 v ds , drain-to-source voltage (volts) v ds , drain-to-source voltage (volts) figure 2, high voltage output characteristics figure 3,low voltage output characteristics 7 v 6 v 6.5 v v gs =10v, 15 v 5.5 v 7 v 6 v 6.5 v 5.5 v 7.5 v v gs =10, 15v 7.5 v 8 v 8 v r ds (on), drain-to-source on resistance i d , drain current (amperes) i d , drain current (amperes) i d , drain current (amperes) (normalized) (normalized) v gs (th), threshold voltage bv dss , drain-to-source breakdown r ds (on), drain-to-source on resistance i d , drain current (amperes) (normalized) voltage (normalized) -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 t j , junction temperature (c) t c , case temperature (c) figure 8, on-resistance vs. temperature figure 9, threshold voltage vs temperature i d = 29a v gs = 12v 1.2 1.1 1.0 0.9 0.8 0.7 0.6 2.5 2.0 1.5 1.0 0.5 0.0
APL502B2_l(g) 050-5896 rev e 2-2010 15.49 (.610) 16.26 (.640) 5.38 (.212) 6.20 (.244) 4.50 (.177) max. 19.81 (.780) 20.32 (.800) 20.80 (.819) 21.46 (.845) 1.65 (.065) 2.13 (.084) 1.01 (.040) 1.40 (.055) 5.45 (.215) bsc 2.87 (.113) 3.12 (.123) 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 2.21 (.087) 2.59 (.102) 0.40 (.016) 0.79 (.031) drain source gate these dimensions are equal to the to-247 without the mounting hole. drain 2-plcs. 19.51 (.768) 20.50 (.807) 19.81 (.780) 21.39 (.842) 25.48 (1.003) 26.49 (1.043) 2.29 (.090) 2.69 (.106) 0.76 (.030) 1.30 (.051) 3.10 (.122) 3.48 (.137) 4.60 (.181) 5.21 (.205) 1.80 (.071) 2.01 (.079) 2.59 (.102) 3.00 (.118) 0.48 (.019) 0.84 (.033) drain source gate dimensions in millimeters and (inches) drain 2.29 (.090) 2.69 (.106) 5.79 (.228) 6.20 (.244) 2.79 (.110) 3.18 (.125) 5.45 (.215) bsc 2-plcs. dimensions in millimeters and (inches) t-max tm (b2) package outline to-264 (l) package outline i d , drain current (amperes) c, capacitance (pf) 400 100 10 1 0.1 400 100 10 1 0.1 v ds , drain-to-source voltage (volts) v ds , drain-to-source voltage (volts) figure 10, forward safe operating area figure 11, maximum forward safe operating area .01 .1 1 10 50 c, capacitance (pf) 30,000 10,000 5,000 1,000 500 100 v ds , drain-to-source voltage (volts) figure 12, capacitance vs drain-to-source voltage scaling for different case & junction temperatures: i d = i d (tc = 25c) *(t c - t j )/125 t j = 125 c t c = 75 c dc line 10ms 1ms 100 m s 13 m s r ds(on) i dm 1 10 100 800 1 10 100 800 dc line 100ms 10ms 100 m s 13 m s r ds(on) i dm c iss c oss c rss 100ms 1ms t j = 150 c t c = 25 c e1 sac 96.5% sn, 3.0% ag, 0.5% cu plated microsemi?s products are covered by one or more of u.s. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,5 03,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743, 7,352,045 5,283,201 5,801,417 5,648,283 7,196,634 6,664,594 7,157, 886 6,939,743 7,342,262 and foreign patents. us and foreign patents pending. all rights reserved.
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